1. Field of the Invention
The present invention relates to a level converter circuit, more particularly, to a level converter circuit having hysteresis characteristics between an input voltage and an output voltage to convert the input voltage to the output voltage.
2. Description of the Related Art
In recent years, a level converter circuit having hysteresis characteristics have been used for an output circuit of various semiconductor circuits or devices to match the output level thereof to the other semiconductor circuits or devices connected thereto. The level converter circuit is constituted by a hysteresis comparator portion for obtaining hysteresis characteristics and a level converter portion for carrying out level conversion. Further, the level converter portion is constituted by a differential amplifier and an output circuit.
In the related art level converter circuit, the hysteresis comparator portion and the level converter portion are independently provided and they are connected in series. Further, the hysteresis comparator portion is constituted by single collector transistors, or normal type bipolar transistors, and the differential amplifier and the output circuit are constituted by a plurality of transistors and diodes. Therefore, the circuit configuration of the level converter circuit becomes complicated, and the number of elements required for the level converter circuit becomes large.
Consequently, for example, in a masterslice type large scale integration (LSI) circuit, such level converter circuit requiring a complicated circuit configuration and the like cannot be arranged. Further. in another LSI circuit except for the masterslice type, when forming the related art level converter circuit, an occupied area thereof becomes large and cost thereof becomes high.